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fThe MC14568B consists of a phase comparator, a divide–by–4, 16, 64 or 100 counter and a programmable divide–by–N 4–bit binary counter (all positive–edge triggered) constructed with MOS P–channel and N–channel enhancement mode devices (complementary MOS) in a monolithic structure.
The MC14568B has been designed for use in conjunction with a programmable divide–by–N counter for frequency synthesizers and phase– locked loop applications requiring low power dissipation and/or high noise immunity.
This device can be used with both counters cascaded and the output of the second counter connected to the phase comparator (CTL high), or used independently of the programmable divide–by–N counter
Mfr Package Description | PLASTIC, DIP-16 |
Status | Discontinued |
Logic IC Type | DIVIDE BY N COUNTER |
Sub Category | Counters |
Count Direction | UP |
Family | 4000/14000/40000 |
fmax-Min | 3.0 MHz |
JESD-30 Code | R-PDIP-T16 |
JESD-609 Code | e0 |
Load/Preset Input | YES |
Mode of Operation | ASYNCHRONOUS |
Number of Functions | 2 |
Number of Terminals | 16 |
Operating Temperature-Min | -55.0 Cel |
Operating Temperature-Max | 125.0 Cel |
Output Characteristics | 3-STATE |
Package Body Material | PLASTIC/EPOXY |
Package Code | DIP |
Package Equivalence Code | DIP16,.3 |
Package Shape | RECTANGULAR |
Package Style | IN-LINE |
Propagation Delay (tpd) | 1440.0 ns |
Qualification Status | Not Qualified |
Seated Height-Max | 4.44 mm |
Supply Voltage-Nom (Vsup) | 5 |
Supply Voltage-Min (Vsup) | 3.0 V |
Supply Voltage-Max (Vsup) | 18.0 V |
Surface Mount | NO |
Technology | CMOS |
Temperature Grade | MILITARY |
Terminal Finish | TIN LEAD |
Terminal Form | THROUGH-HOLE |
Terminal Pitch | 2.54 mm |
Terminal Position | DUAL |
Trigger Type | POSITIVE EDGE |
Length | 19.175 mm |
Width | 7.62 mm |